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Microchip

RISC-V Summit

San Jose Convention Center 150 W San Carlos Street, San Jose, CA, United States

Each day, thousands of engineers around the world collaborate and contribute to advance the most prolific open, license and royalty-free computing architecture. They share technical investment and help shape the architecture’s strategic future so everyone may create more rapidly, enjoy unprecedented design freedom, and substantially reduce the cost of innovation. Anyone, anywhere can benefit from the open intellectual… Read More »RISC-V Summit

EE Times – AI Everywhere Forum

Artificial intelligence (AI) is pervading almost every area of electronics today: from data centers, through edge accelerators to endpoint devices. Applications range from large scale analysis of medical data and online retail recommendation engines, to robotics and computer vision, to sensor fusion in the tiniest sensor nodes. The infusion of AI techniques into so many… Read More »EE Times – AI Everywhere Forum

VLSID 2023

Hyderabad International Convention Cente Hyderabad, Telangana, India

International VLSI Design & Embedded Systems conference is a Premier Global conference with legacy of over three and half decades. This Global Annual technical conference that focusses on latest advancements in VLSI and Embedded Systems, is attended by over 2000 engineers, students & faculty, industry, academia, researchers, bureaucrats and government bodies. Semiconductors are the intangible… Read More »VLSID 2023

International Symposium on Field-Programmable Gate Arrays

Monterey Marriott 350 Calle Principal, Monterey, CA, United States

The ACM/SIGDA International Symposium on Field-Programmable Gate Arrays is a premier conference for presentation of advances in FPGA technology. In 2023, the 31st edition of FPGA will be held in Monterey, California, USA. Accepted papers will be published in the conference proceedings and available in the ACM Digital Library. At least one of the authors… Read More »International Symposium on Field-Programmable Gate Arrays

Linting and Clock Domain Crossing Analysis for Microchip FPGA Designs

The use of advanced verification tools can significantly reduce the number of non-trivial bugs, save engineering time and resources and, more importantly, increase the reliability of FPGA designs. Static design verification is an essential part of a robust verification process that includes advanced linting and Clock Domain Crossing (CDC) analysis. In this webinar, we will… Read More »Linting and Clock Domain Crossing Analysis for Microchip FPGA Designs

Automotive Ethernet Congress

Hilton Munich Airport Terminalstraße Mitte 20, 85356 München-Flughafen, Munich, Germany

The ninth Automotive Ethernet Congress to be held on March 21 - 23, 2023 at the Hilton Munich Airport will look to address the following questions: Does the selected transmission technology support the transformation of the E/E architecture from hardware-based to software-centric? Does it offer the necessary flexibility and self-learning capability to be able to continuously… Read More »Automotive Ethernet Congress

FPGA Conference Europe 2023

NH München Ost Conference Center Einsteinring 20, Munich, Aschheim, Germany

FPGAs have made a regular evolutional leap forward in terms of new approaches and solutions for both hardware- and software developers. The FPGA Conference Europe, organized by ELEKTRONIKPRAXIS and the FPGA training center PLC2, is addressing that progress across all major manufacturers. It focusses on user-oriented, practically applicable solutions that developers can quickly integrate into… Read More »FPGA Conference Europe 2023

FPGAworld Conference 2023 – Stockholm

ÅF Frösundaleden 2A, 169 70 Solna, Sweden

The FPGAworld Conference is an international forum for researchers, engineers, teachers, students, and hackers. It covers topics such as complex analog/digital/software FPGA SoC systems, FPGA/ASIC-based products, educational & industrial cases, and more. Registration for attendees is free and includes 2*coffee, lunch and go-home drink. Keynote Speaker Copenhagen and Stockholm 2023 Keynote speaker: Martin Kellermann , Microchip… Read More »FPGAworld Conference 2023 – Stockholm

RISC-V Summit US

Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United States

Each day, thousands of engineers around the world collaborate and contribute to advance RISC-V, the open-standard instruction set architecture that is defining the future of open computing. The RISC-V community shares the technical investment and helps shape the architecture’s strategic future so everyone may create more rapidly, enjoy unprecedented design freedom, and substantially reduce the… Read More »RISC-V Summit US

VLSID 2024

ITC Royal Bengal Kolkata, India

The 37th International Conference on VLSI Design & the 23rd International Conference on Embedded Systems (VLSID 2024) are being held at Kolkata, India, during January 6-10, 2024. VLSID 2024 is returning to the city after 8 years since 2016. This flagship conference is bringing worldwide industry leaders, Indian and international industry bodies, and academic researchers in a… Read More »VLSID 2024

FPGA Forum 2024 – Norway

Royal Garden Trondheim, Norway

FPGA-forum is a yearly event for the Norwegian FPGA community. FPGA-designers, project managers, technical managers, researchers, final year students and the major vendors gather for a two-day focus on FPGA. There will be presentations from the Norwegian industry about methodology and practical experience, – the universities will present new and exciting projects, and the vendors… Read More »FPGA Forum 2024 – Norway

High-Performance RTL Simulation Workflow with Libero and Active-HDL

Based on recent industry research, the FPGA market was valued at approximately USD 7.5 Billion in 2023, with an expected compound annual growth rate (CAGR) of around 10% by 2032. More and more engineers will be adopting FPGAs due to their versatility, acceleration capability, power efficiency and lower non-recurring engineering (NRE) costs (compared to ASICs).… Read More »High-Performance RTL Simulation Workflow with Libero and Active-HDL