Mirabilis
Compare Performance-power of Arm Cortex vs RISC-V for AI applications
In the Webinar, we will show you how to construct, simulate, analyze, validate, and optimize an architecture model using pre-built components. We will compare micro and application benchmarks on system SoC models containing clusters of ARM Cortex A53/A77/A65AE/N1, SiFive u74, and other vendor cores. Aside from the processor resources such as cache and memory, the… Read More »Compare Performance-power of Arm Cortex vs RISC-V for AI applications
Balancing Performance and Power in adding AI Accelerators to System-on-Chip (SoC)
• Do you need to estimate the power advantage of implementing an AI algorithm on an accelerator? • Do you need to size the AI accelerator for existing and future AI requirements? • Would it be beneficial if you knew the latency advantage between ARM, RISC, DSP and Accelerator in deploying AI tasks? This webinar… Read More »Balancing Performance and Power in adding AI Accelerators to System-on-Chip (SoC)
Adding Intelligence to Electronic Product Lifecycle using Requirements management
This Webinar will cover a methodology that can be easily integrated into the system design and systems engineering process. VisualSim Insight Engine provides an intelligent way to connect the Requirements to system specification by running Monte Carlo simulation to detect the quality, efficiency, reliability and compliance to the Requirements. You can identify areas of improvement,… Read More »Adding Intelligence to Electronic Product Lifecycle using Requirements management
Automotive Ethernet Congress
Hilton Munich Airport Terminalstraße Mitte 20, 85356 München-Flughafen, Munich, GermanyWELCOME POWERFUL NETWORK FOR THE COMPUTER ON WHEELS The Automotive Ethernet Congress will take place for the eighth time on June 1 - 2, 2022. The conference program will highlight the entire spectrum of topics relating to the use of Ethernet in vehicles. The vehicle is undergoing the greatest change since its inception. Automation, networking, and digitalization of the… Read More »Automotive Ethernet Congress
Architecture Exploration of Automotive Networks, Radars, and Semiconductors
The buzzwords of 2022 are autonomous driving, radars, and semiconductor and they are all similar in more than one-way. All have protocols, schedulers, sensors, high performance computing, software, networks, interfaces, antennas, and attenuators. VisualSim Architect is used to architect and verify all these applications. Join us for this Webinar on Commonality in the Architecture Exploration… Read More »Architecture Exploration of Automotive Networks, Radars, and Semiconductors
Evaluating UCIe based multi-die architectures to meet timing and power constraints
Multi-die architectures have evolved from proprietary to industry standard UCIe. UCIe can accommodate the bulk of designs today from 8 Gbps per pin to 32 Gbps per pin for high-bandwidth applications from networking to Hyperscale data centers. To help your UCIe adoption journey, we present VisualSim Architect and the associated UCIe/PCIe6.0 IPs to explore and… Read More »Evaluating UCIe based multi-die architectures to meet timing and power constraints
Accelerated development in Automotive E/E Systems using VisualSim Architect
We have put together a webinar on November 10th titled: Accelerated development in Automotive E/E Systems using VisualSim Architect . We will provide an introduction to the available features and utilities in VisualSim architect for Automotive Networking, Hardware ECU and Software design exploration. We will present use cases in ADAS, braking, FuSa, AI accelerator enhanced… Read More »Accelerated development in Automotive E/E Systems using VisualSim Architect
Automotive Ethernet Congress
Hilton Munich Airport Terminalstraße Mitte 20, 85356 München-Flughafen, Munich, GermanyThe ninth Automotive Ethernet Congress to be held on March 21 - 23, 2023 at the Hilton Munich Airport will look to address the following questions: Does the selected transmission technology support the transformation of the E/E architecture from hardware-based to software-centric? Does it offer the necessary flexibility and self-learning capability to be able to continuously… Read More »Automotive Ethernet Congress
Mapping SysML to hardware architecture
In this webinar, we will show how the SysML behavior models of a RADAR application can be mapped to a architecture model to measure the latency, throughput, power consumption, scheduling quality and response to bottleneck conditions. The application can be quickly mapped onto different architectures to meet the project requirements. This will enable better tuning… Read More »Mapping SysML to hardware architecture