PCIe
Latest Past Events
ARM corelink, Arteris NoC, UCIe, Bunch-of-wires, CXL and PCIe- Designing the interconnect is not for the weak-hearted
There are so many options for Network-on-Chip: ARM-Corelink CMN700, Arteris FlexNoC, open-source NoC interconnect, and of course developing home-grown fully customized solutions. Where does each solution fit? Where do we use it- backplane vs inside domains? How does AMBA AXI or PCIe or CXL fit in the mix? With the advent of chiplet, do we… ARM corelink, Arteris NoC, UCIe, Bunch-of-wires, CXL and PCIe- Designing the interconnect is not for the weak-hearted
Keysight EDA Connect World Tour: Santa Clara – High Speed Digital
Keysight Technologies 5301 Stevens Creek Boulevard, Santa ClaraShift Left with the Modern Design Center Artificial intelligence (AI) is redefining high-speed digital designs. Your ability to design, simulate, and test — using an automated, integrated workflow — is what will set you apart. Whether you are a design team leader, digital designer, or system engineer, this one-day event is for you. We have… Keysight EDA Connect World Tour: Santa Clara – High Speed Digital
Comprehensive PCIe Verification Solution for bleeding edge and mission critical SoC & IP Designs
Applications such as Data Centers, High-Performance computing (HPC), artificial intelligence/machine learning (AI/ML), cloud computing, military, and aerospace, automotive, etc. are all extremely Bandwidth-hungry. To cater to such high demands of high speeds and bandwidth requires a breakthrough that HPC SoCs are constantly facing. High speed interfaces like PCI Express® (PCIe®) 5.0 and 6.0 show promising… Comprehensive PCIe Verification Solution for bleeding edge and mission critical SoC & IP Designs