Synopsys
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International Symposium on Physical Design (ISPD) 2023
General Information The International Symposium on Physical Design (ISPD) provides a premier forum to exchange ideas and promote innovative research in all aspects of physical design ranging from traditional topics for ASIC and FPGA designs to emerging technologies that impact physical design of integrated circuits (ICs). In 2023, ISPD will be online with virtual participation,… International Symposium on Physical Design (ISPD) 2023
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IRPS 2023
Hyatt Regency Monterey 1 Old Golf Course Rd, Monterey, CA, United StatesFor 60 years, IRPS has been the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and all other parts of the world… IRPS 2023 will be presented as an in-person conference, with a virtual component available. The… IRPS 2023
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SNUG Silicon Valley 2023
Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United StatesSince 1991, the Synopsys Users Group (SNUG) has represented a global design community focused on innovating from Silicon to Software. Today, as the electronics industry’s largest user conference, SNUG brings together over 12,000 Synopsys tool and technology users across North America, Europe, Asia, and Japan. In addition to peer-reviewed technical presentations and insightful keynotes from… SNUG Silicon Valley 2023
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How to Achieve Seamless Deployment of Level 3 Virtual ECUs for Automotive Digital Twins
Driven by the trend towards software-defined vehicles (SDV), more complex software stacks are now being integrated into innovative automotive E/E architectures. Today the early integration testing of automotive software is already supported by using virtual ECUs (vECUs). However, the production basic software (BSW) is often not included because the virtualization of the hardware-specific microcontroller abstraction layer (MCAL)… How to Achieve Seamless Deployment of Level 3 Virtual ECUs for Automotive Digital Twins
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Shorten Your CDC Debug Cycle by 10X with ML-based RCA
Over the last few decades System on Chip (SoC) design size has dramatically increased, and more complexity has been introduced to deliver the desired functionality. Growing design sizes lead to the introduction of several asynchronous clocks which can result in the reporting of millions of clock domain crossings (CDC) at the IP/SoC level. This leads… Shorten Your CDC Debug Cycle by 10X with ML-based RCA
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DATE 2023
Flanders Meeting & Convention Center Antwerp Antwerp, BelgiumThe DATE conference is the main European event bringing together designers and design automation users, researchers and vendors as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems. DATE puts a strong emphasis on both technology and systems, covering ICs/SoCs, reconfigurable hardware and embedded systems as well… DATE 2023
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Taking the Risk out of RISC-V with Fast, Architecture-Driven, PPA Optimization
The use of the RISC-V ISA to develop processors for SoCs is a growing trend. An important driver is the ability to customize or create ISA and micro-architectural extensions to differentiate designs across application areas including AI, machine learning, automotive, data center, mobile, and consumer. Traditionally, designing proprietary cores with the right extensions has been… Taking the Risk out of RISC-V with Fast, Architecture-Driven, PPA Optimization
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CICC 2023
Sponsored by IEEE and SSCS, the IEEE Custom Integrated Circuits Conference – CICC – is a premier conference devoted to IC development. The conference program is a blend of oral presentations, exhibits, panels and forums. The conference sessions present original first published technical work and innovative circuit techniques that tackle practical problems. CICC is the conference… CICC 2023
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D&R IP-SoC Silicon Valley 2023
Hyatt Regency Santa Clara 5101 Great America Parkway, Santa Clara, CA, United StatesWhere : Hyatt Regency Santa Clara 5101 Great America Parkway, Santa Clara, CA D&R IP-SoC Silicon Valley 2023 Day is the unique worldwide Spring event fully dedicated to IP (Silicon Intellectual Property) and IP based Electronic Systems. IP-SoC providers, the seed of innovation in Electronic Industry, are invited to highlight their latest products and services… D&R IP-SoC Silicon Valley 2023
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41st IEEE VLSI Test Symposium 2023
Hyatt Regency Mission Bay Spa & Marina 1441 Quivira Road, San Diego, CA, United StatesThe IEEE VLSI Test Symposium (VTS) explores emerging trends and novel concepts in test, validation, yield, reliability, and security of microelectronic circuits and systems. The symposium will take place on April 24-26, 2023, at the Hyatt Regency Mission Bay Spa & Marina, 1441 Quivira Road, San Diego, CA, USA. The program includes keynotes, scientific paper… 41st IEEE VLSI Test Symposium 2023
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RSAConference 2023
Moscone Center 747 Howard Street, San Francisco, CA, United StatesWhere the World Talks Security™ Don’t miss the opportunity to take your knowledge and skills to the next level at RSAC 2023. Not sure if the complete Conference experience will work with your schedule and budget? We offer several pass options—including an On Demand Pass. But hurry, our final discount ends Friday, April 21! In… RSAConference 2023
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DVClub Europe – Performance Testing and Analysis
Discuss the performance verification challenges posed by complex SoC with distributed cache from cluster, to interconnect to die-to-die. Agenda (BST) 12:00 Welcome and Introduction – Mike Bartley, Tessolve 12:00 Nick Heaton, Cadence Design Systems - SoC Verification in a Multi-chip, Multi-die world 12:30 TBD 13:00 TBD 13:30 Close Additional Information For additional information please visit… DVClub Europe – Performance Testing and Analysis