Tessolve
Verification Futures Conference 2024 UK
The Verification Futures conference provides a unique blend of conference presentations, exhibitions, training and industry networking sessions dedicated to discussing the challenges faced in hardware and software verification. Verification Futures provides a unique opportunity for end-users to define their current and future verification challenges and collaborate with the vendors to create solutions. It also provides… Verification Futures Conference 2024 UK
Ensuring my Design Verification is ISO26262 Compliant
Cadence, Bengaluru Sarjapur Outer Ring Road, Bengaluru, IndiaWith the widespread of the modern automobiles, run and regulated by automotive ECUs, the need for advanced safety features has also become inevitable. And this is why today modern vehicles are required to adhere to the safety standards listed within the Automotive Safety Integrity Level (ASIL).In this DVClub meeting our speakers will share best practices… Ensuring my Design Verification is ISO26262 Compliant
ITC India 2024
Radisson Blu Outer King Road, Bengaluru, IndiaInternational Test Conference is the world’s premier venue dedicated to the electronic test of devices, boards and systems-covering the complete cycle from design verification, design-for-test, design-for-manufacturing, silicon debug, manufacturing test, system test, diagnosis, reliability and failure analysis, and back to process and design improvement. At ITC India, design, test, and yield professionals can confront challenges… ITC India 2024
DVClub Europe – September 2024
This DVClub event will have talks on verification of low power features of VLSI designs, discussing strategies for accurately measuring power consumption and ensuring that power-saving mechanisms are effective. Additionally, speakers will share insights on how to simulate and analyze different power scenarios to identify potential issues and optimize power management techniques. Attendees will have… DVClub Europe – September 2024
Verification Futures Conference 2024 Austin
Austin Marriott South 4415 South Interstate 35 Frontage Road, Austin, TX, United StatesThe Verification Futures conference provides a unique blend of conference presentations, exhibitions, training and industry networking sessions dedicated to discussing the challenges faced in hardware and software verification. Verification Futures provides a unique opportunity for end-users to define their current and future verification challenges and collaborate with the vendors to create solutions. It also provides… Verification Futures Conference 2024 Austin
DVCon India 2024
Hotel Radission Blu, Marathalli ORR 90/4 Outer Ring Road, Bengaluru, IndiaOn behalf of the DVCon India 2024 steering committee, it is my pleasure to welcome you all to the 9th edition of the Design and Verification Conference in India planned from 18- 19th September 2024 in Bangalore, India. The theme of this year’s conference is “Architecture to Analytics – A2A“. We want to carry forward… DVCon India 2024
Tessolve AI Strategy & Eco System for DV
With the increasing importance of AI in engineering and the exciting potential for it’s use in Design Verification, Tessolve has been working on improving internal DV processes, with impressive reductions in both effort and costs, and with many clients to improve both efficiency and quality in DV through AI. In this series of 3 short… Tessolve AI Strategy & Eco System for DV
Webinar 2: Tessolve AI assisted DV Flow
With the increasing importance of AI in engineering and the exciting potential for it’s use in Design Verification, Tessolve has been working on improving internal DV processes, with impressive reductions in both effort and costs, and with many clients to improve both efficiency and quality in DV through AI. In this series of 3 short… Webinar 2: Tessolve AI assisted DV Flow
FPGA Front Runner: FPGA Safety and Security
The Cass Centre Shaftesbury Road, Cambridge, United KingdomThis event covers the challenges in ensuring an FPGA is secure and demonstrably safe as per the relevant industry safety standards. This includes supply chains, FPGA hardware and the IP used on the FPGA Agenda (GMT) Time Speaker Details 09.30 Arrival and registration 10.00 Tobias Adryan, Synopsys Securing FPGAs Beyond the Bitstream 10.30 Espen Tallaksen,… FPGA Front Runner: FPGA Safety and Security
DVClub Europe – AI/ML in Verification
This DVClub will consider how we can save time and effort whilst improving time-to-market through the application of AI/ML to design verification. Agenda (GMT): Time Session Description Slides Videos 12.00 GMT Welcome and Introduction – Mike Bartley, Tessolve Mike Bartley,Tessolve 12.00 GMT Hardik Raina, Agnisys, Inc - Genetic Algorithms for Automated Verification from VCD Data. 12.20… DVClub Europe – AI/ML in Verification
Webinar 3: Tessolve AI assisted advanced DV Flow and Use cases
Webinar 3: Tessolve AI assisted advanced DV Flow and Use cases With the increasing importance of AI in engineering and the exciting potential for it’s use in Design Verification, Tessolve has been working on improving internal DV processes, with impressive reductions in both effort and costs, and with many clients to improve both efficiency and quality… Webinar 3: Tessolve AI assisted advanced DV Flow and Use cases
Using AI in development and product for FPGA
Renishaw plc New Mills, Wotton-under-Edge, Gloucestershire, United KingdomFPGA Front Runner - Using AI in development and product for FPGA How are they used? What input language is used and how does it find it’s way into the FPGA? How is the AI trained? Any use case example Agenda (GMT) Time Speaker Details 09.00 Arrival and registration 09:30 Pete Leonard, Renishaw Introduction to… Using AI in development and product for FPGA