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Aldec, January 23, 2025

Mastering SoC Design and Verification for DO-254 Compliance

System on Chip (SoC) devices are transforming the landscape of advanced aviation systems, offering unparalleled integration of multiple functionalities within a single chip. These compact powerhouses bring numerous advantages, from reduced power consumption to enhanced… 

2024

Happy Hanukkah, Merry Christmas – 2024

Previous years: 2023 2022 2021 2020 2019 2018 2017 2016 Happy holidays from all of us at Broadcom! Wherever you are in the world, we're wishing you a season of peace, joy, and connection. Here’s to a bright and connected 2025! pic.twitter.com/THNRGlErfS… 

Aldec, October 17, 2024

Static and Dynamic CDC Verification of AXI4 Stream-based IPs

The AXI4 Stream protocol is used as a standard interface to exchange data between connected IPs within FPGA designs. For crossing clock domains, the AXI4 Stream interconnect is based on switches capable of transferring data… 

Aldec, September 5, 2024

Using OSVVM’s AXI4 Verification Components

Abstract: This “Getting Started” presentation is for engineers who need to use the OSVVM AXI4 verification components (VCs) in their testbenches. Part 2 of this presentation focuses on how to write tests and configure the… 

Aldec, August 15, 2024

Why Should Our Team be Using VHDL + OSVVM for Verification?

Abstract: This is a high-level presentation that identifies the key aspects of a modern verification methodology and shows how to achieve them with OSVVM. This is a great presentation to share with your management about… 

DVCon Japan 2024

DVCon Japan 2024

The Design & Verification Conference & Exhibition is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits. The focus of this… 

fpga conference europe 2024

FPGA Conference Europe

The FPGA Conference Europe, organized by ELEKTRONIKPRAXIS and the FPGA training center PLC2, is Europe’s leading specialist conference for programmable logic devices. The conference focusses on user-oriented, practically applicable solutions that developers can quickly integrate… 

Aldec, April 11, 2024

Making a Structured VHDL Testbench – A Demo for Beginners

Abstract: This demonstrated tutorial is intended for designers and verification engineers who want to learn to make better and more structured testbenches. This session will show you what is needed for any good testbench, irrespective…