System on Chip (SoC) devices are transforming the landscape of advanced aviation systems, offering unparalleled integration of multiple functionalities within a single chip. These compact powerhouses bring numerous advantages, from reduced power consumption to enhanced… Mastering SoC Design and Verification for DO-254 Compliance
Previous years: 2023 2022 2021 2020 2019 2018 2017 2016 Happy holidays from all of us at Broadcom! Wherever you are in the world, we're wishing you a season of peace, joy, and connection. Here’s to a bright and connected 2025! pic.twitter.com/THNRGlErfS… Happy Hanukkah, Merry Christmas – 2024
The integration of COTS-IP (Commercial Off-The-Shelf Intellectual Property) components in FPGA-based Avionics systems can significantly speed up development and enhance performance. However, it also introduces unique challenges, as these components may not align with the… Navigating COTS-IP in DO-254: Strategies for Safe and Efficient FPGA Design
The AXI4 Stream protocol is used as a standard interface to exchange data between connected IPs within FPGA designs. For crossing clock domains, the AXI4 Stream interconnect is based on switches capable of transferring data… Static and Dynamic CDC Verification of AXI4 Stream-based IPs
Abstract: This “Getting Started” presentation is for engineers who need to use the OSVVM AXI4 verification components (VCs) in their testbenches. Part 2 of this presentation focuses on how to write tests and configure the… Using OSVVM’s AXI4 Verification Components
European Session Abstract: This “Getting Started” presentation is for engineers who need to use the OSVVM AXI4 verification components (VCs) in their testbenches. Part 1 of this presentation provides a detailed walkthrough of creating a… Using OSVVM’s AXI4 Verification Components: Pt 1 Creating the AXI4 Testbench / Test Harness
Abstract: This is a high-level presentation that identifies the key aspects of a modern verification methodology and shows how to achieve them with OSVVM. This is a great presentation to share with your management about… Why Should Our Team be Using VHDL + OSVVM for Verification?
The Design & Verification Conference & Exhibition is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits. The focus of this… DVCon Japan 2024
The FPGA Conference Europe, organized by ELEKTRONIKPRAXIS and the FPGA training center PLC2, is Europe’s leading specialist conference for programmable logic devices. The conference focusses on user-oriented, practically applicable solutions that developers can quickly integrate… FPGA Conference Europe
Abstract: This demonstrated tutorial is intended for designers and verification engineers who want to learn to make better and more structured testbenches. This session will show you what is needed for any good testbench, irrespective… Making a Structured VHDL Testbench – A Demo for Beginners