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Cadence, November 15, 2022

Three Issues Every EE Needs to Overcome to Sign Off on High-Speed PCB Designs

Signal integrity/power integrity (SI/PI) are top priorities for engineers designing today’s high-speed, high-density circuit boards. Faster signoff of designs can be achieved by uncovering signal SI/PI issues early in the design process. This webinar will… 

Cadence, October 20, 2022

Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator

Simulator performance is critical owing to the exponentially increasing complexity of SoC designs and shrinking market time. Cadence® Xcelium™ is a leader in simulation performance, and we focus relentlessly on improving the core performance of the simulator.…