AI Hardware Summit
The AI Hardware Summit is the premier commercial event focused on systems-first machine learning. Our community’s goal is to reduce time-to-value in the ML lifecycle, and to unlock new possibilities for AI development. This…
Cadence
Sustainability for Semiconductors
Don’t miss your chance to join this important conversation with industry leaders that are making an impact on the reduction of the semiconductor carbon footprint. Donna Yasay Senior Leader, Solutions Architecture at Amazon Web Services…
Flash Memory Summit
Program It is ideal for consumer applications such as cellphones, digital cameras, and music players, and is also useful in computers, communications systems, and military/defense applications. It can replace hard disks for storage in applications…
Jasper User Group 2022
Ready to share and discuss the latest design and verification best practices with your peers from around the world? It’s time for our annual Jasper™ User Group Conference held on October 19 and 20 at…
Driving Low-Power Design with High-Level Synthesis
With the growth in computing at the edge driven by the explosion of battery-powered smart devices, designing for low power is mission-critical to product success. Numerous techniques, spanning all stages of design, are employed to…
Digital Engineering Best Practices for Aerospace & Defense
Register for this Cadence TECHTALK™ webinar, where senior director of solutions marketing Frank Schirrmeister will discuss how commercial electronics hardware companies use cutting-edge design techniques to ensure that their hardware/software designs work as intended prior…
NAFEMS Americas Conference 2022
NAFEMS Americas will be hosting its biennial regional conference, formerly known as CAASE, on June 21-23, 2022, face-to-face, at the Indiana Convention Center in Indianapolis, Indiana! The NAFEMS Americas Regional Conference 2022 (NRC22 Americas) will bring together the leading…
Increase Efficiency and Reduce Risks with IC and Package Co-Design Flows
System designers face increasing challenges in meeting technical specifications and time-to-market requirements. While process nodes continue to shrink, the complexity of packages continues to grow. Large pin counts of flipped and rotated ICs may accidentally…
Debugging Features of UVM
A UVM testbench is a large and complex piece of software. At some stage, like any other large and complex piece of software, a verification environment written using UVM is going to require debugging. There…
How Static and Dynamic IR Drop Analysis Can Help PCB Designs Challenges
As boards become smaller and faster, the environment for thermal issues becomes increasingly challenging. The thermal management of significant resistive losses in PCB and package structures is critical, especially because these resistive losses are also…