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RISC-V SUMMIT EUROPE

RISC-V Summit Europe

On 5-9th June, in Barcelona, RISC-V Summit Europe brings together developers, architects, technical decision and policy makers from across European RISC-V ecosystem. Attendees from academia, research, SMEs, industry and open source communities will gather to… RISC-V Summit Europe

DVClub Europe 2022

RISC-V Verification Strategies

With the popularity of the RISC-V open architecture, many companies are looking for Verification Strategies for developing their own cores or how to verify their integration into a subsystem or SoC. Time Session Description Slides… RISC-V Verification Strategies

RISC-V Summit

RISC-V Summit

Each day, thousands of engineers around the world collaborate and contribute to advance the most prolific open, license and royalty-free computing architecture. They share technical investment and help shape the architecture’s strategic future so everyone may create… RISC-V Summit

Accellera, September 15, 2022

Workshop on the Evolution of SystemC Standards

The SystemC Evolution Fika is a series of online workshops to discuss the latest SystemC developments and applications. We refer to these workshops as fikas, to honor the fika tradition of sharing a coffee, slowing down… Workshop on the Evolution of SystemC Standards

SemIsrael, September 13, 2022

SemIsrael Tech Webinar

Stay Tuned… Advanced RISC-V processor verification and methodologies This talk will outline the latest advances in RISC-V functional verification to address the demands of high-reliability and automotive applications, including the innovations in processor designs with… SemIsrael Tech Webinar

DVCon 2023

DVCon U.S. 2023

The 2023 Design and Verification Conference and Exhibition United States (DVCon U.S.), sponsored by Accellera Systems Initiative, announces its call for extended abstract proposals. The submission site for extended abstracts will be open from July 11 through… DVCon U.S. 2023

OpenHW, April 21, 2022

What’s Behind the Infrastructure of the CORE-V Family

Automated code validation, continuous integration and test regression are cornerstones of OpenHW Group’s community-based engineering process to develop and verify high-quality processor cores. OpenHW Group is deploying a state-of-the-art Test Automation and Continuous Integration environment… What’s Behind the Infrastructure of the CORE-V Family