A large volume of data is required for high performance computing (HPC) workloads in data centers. As a result, enabling data processing between machines and servers across long reach channels at high rates becomes mandatory.… Keeping Latency to a Minimum with 400G/800G Ethernet IP
International Test Conference, the cornerstone of TestWeek™ events, is the world’s premier conference dedicated to the electronic test of devices, boards and systems-covering the complete cycle from design verification, test, diagnosis, failure analysis and back… Iternational Test Conferece
Thursday, September 30, 2021 | 11:00 -11:30 a.m. PDT The development of secure systems is of paramount importance in this age of software intensive electronic systems. Security weaknesses in the SoC hardware can lead to… Avoiding SoC Security Threats – What Verification Engineers Should Know
For more than a decade, The Linley Group has delivered the industry’s premier processor conferences. This year, the Linley Fall Processor Conference will return to Santa Clara on October 20-21, 2021. If you can’t attend… Linley Fall Processor Conference 2021
Why You Should Attend SNUG South Asia Pre-registration is required to join the live attendance. Hear users showcase best practices for design & verification challenges Attend tutorials for the latest advancements in Synopsys technology Stay… SNUG South Asia
The Design and Verification Conference in Europe (DVCon Europe) is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored… DVCon Europe 2021
Powering Photonic IC Design & Manufacturing September 21-22, 2021 8:00–11:30 a.m. PT A Virtual Experience Photonics and photonic IC technologies are crucial to support rapidly evolving internet, healthcare, mobility, and security needs. Driven by data… Synopsys Photonic Symposium
In this webinar, Synopsys and Arm describe how their recent collaboration helps maximize system performance and shorten Arm-based SoC design cycles. Learn how to minimize HPC/data center SoC design risk and ensure end-to-end IP integration,… How Synopsys Interface IP and Arm Interoperate to Accelerate System IO and Memory Performance
Low power is an increasingly critical requirement for all modern SoCs. Moreover, it is becoming more and more difficult with complex architectures being used in modern designs. This has made it necessary for designers to invest heavily in this verification effort throughout… Pre-empt Late-stage Low Power Issues using Predictive Analysis
Why Attend? Join us for the ARC® Processor Virtual Summit to hear our experts, users and ecosystem partners discuss the most recent trends and solutions that impact the development of SoCs for embedded applications. This… ARC Processor Virtual Summit 2021