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Keysight, April 16, 2024

Streamline MMIC Design Efficiency with Intelligent Design Data Management

In the fast-evolving world of monolithic microwave integrated circuit (MMIC) design, meeting higher-frequency requirements is just the beginning. Are you seeking insights on achieving dimensional accuracy for both analog and RF components? Wondering about the… Streamline MMIC Design Efficiency with Intelligent Design Data Management

Cadence, April 4, 2024

Hierarchical Analysis of EM Crosstalk with EMX Planar 3D Solver

Identifying sources of electromagnetic (EM) coupling and safeguarding today’s complex electronic designs from EM crosstalk are daunting tasks. For designs with multiple levels of hierarchy, identification, and detailed analysis of the “EM-sensitive” content is a… Hierarchical Analysis of EM Crosstalk with EMX Planar 3D Solver

Cadence, March 2024

Virtuoso – Finding Hidden Treasures to Accelerate Routing Your Layout

Every layout designer frets over routing all the interconnects DRC clean and correct as per the circuit designer’s expectations. On the one hand, you want a magic wand that just hooks up all the connections… Virtuoso – Finding Hidden Treasures to Accelerate Routing Your Layout

Cadence, March 2024

Maximizing the Benefits of Virtuoso Layout Suite XL

Find out how the Virtuoso Layout Suite XL you’ve known for many years is setting new standards in custom layout authoring. The connectivity-driven paradigm keeps the layout in synch with the circuit design and ensures… Maximizing the Benefits of Virtuoso Layout Suite XL

Cadence, March 2024

Virtuoso – Save on Signoff Effort with In-Design DRC and Fill

Virtuoso Layout Suite has pioneered in-design DRC checking and fixing in the layout editor. However, many of you have realized that the lack of completeness of rules in the techfile has caused many violations to… Virtuoso – Save on Signoff Effort with In-Design DRC and Fill

Cadence, March 2024

What’s New About Virtuoso Layout Suite?

Accelerate Layout Creation with Automated Place and Route in Virtuoso Studio How can you cut down custom layout implementation from days to minutes? Custom device-level automated place and route (APR) for advanced nodes has very… What’s New About Virtuoso Layout Suite?

Cadence August 24, 2023

Virtuoso Studio and Signoff Technology Day

Join us at CadenceCONNECT™: Virtuoso Studio and Signoff Technology Day focusing on our latest technology within the new Cadence® Virtuoso® Studio. Date: Thursday, August 24, 2023 Time: 8:30am – 5:00pm Location: Cadence Design Systems, San… Virtuoso Studio and Signoff Technology Day

EDA Direct, August 18, 2022

A Key principle to successful tape-outs for Cadence Virtuoso users 10am PDT

As working remotely and virtually has become the new norm, collaboration and coordination between colleagues has its challenges and its obstacles. If you are using Cadence Virtuoso and working on schematics and layouts we will… A Key principle to successful tape-outs for Cadence Virtuoso users 10am PDT

Cadence Virtuoso Update

On July 16th I met with three Cadence people in Oregon to get an update on the Virtuoso product line, the  leading IC layout and design environment in EDA: John Stabenow, Marketing Group Director, Virtuoso Platform David… Cadence Virtuoso Update