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Cadence, September 12, 2024

Leveraging Verisium Debug to Debug Digital-Mixed Signal Designs

Many of today’s designs that are primarily digital also contain analog components. We refer to such designs as “Digital-Mixed-Signal” or DMS designs. In this webinar, we will demonstrate using the Verisium Debug App to debug… Leveraging Verisium Debug to Debug Digital-Mixed Signal Designs

Cadence, January 23, 2024

Verisium SimAI: Coverage Gaps Meet Their Match

Every project has some areas that seem impossible to cover. Various factors can cause these nearly impossible-to-hit coverage gaps, including technical complexity, lack of resources, and shifting requirements. In constrained random environments, simply running more… Verisium SimAI: Coverage Gaps Meet Their Match

Cadence, November 1, 2023

Warp Speed Gate-Level Simulations with the Xcelium Multi-Core App

Are you ready to lead the way in gate-level digital simulations (GLS)? Dive into Cadence’s exclusive webinar and uncover the revolutionary Xcelium Multi-Core (MC) App—a game changer for GLS, allowing you to parallelize and expedite… Warp Speed Gate-Level Simulations with the Xcelium Multi-Core App

Cadence, October 31, 2023

Enhance Verification Quality with the Xcelium Mixed-Signal App

The comprehensive verification of analog mixed-signal (AMS) designs has challenges in schedules and implementations due to the vast divergence in design flows of the analog and digital portions of the SoC. These discrepancies include priorities… Enhance Verification Quality with the Xcelium Mixed-Signal App

Cadence, June 7, 2023

Xcelium: The Key to Unlocking Unmatched Mixed-Signal Performance

Xcelium mixed-signal simulation enables teams to achieve digital simulation speeds of analog models and opens mixed-signal designs to advanced verification techniques typically applied within standard verification flows.  Built on a SystemVerilog Real Number Modeling (RNM)… Xcelium: The Key to Unlocking Unmatched Mixed-Signal Performance

Cadence, January 25, 2023

Low-Power Verification Using Xcelium Simulation

Don’t let power-related issues that appear late in the verification cycle impact your project schedule. Register for a webinar that shows you how to catch low-power issues early on. The Cadence low-power solution considers power… Low-Power Verification Using Xcelium Simulation

Cadence, October 20, 2022

Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator

Simulator performance is critical owing to the exponentially increasing complexity of SoC designs and shrinking market time. Cadence® Xcelium™ is a leader in simulation performance, and we focus relentlessly on improving the core performance of the simulator.… Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator

Cadence, September 21, 2022

Xcelium Apps: Everything You Need in the Simulation Metaverse

Register for this CadenceTECHTALK if you are looking for an end-to-end solution for all your verification requirements in automotive, mobile, and hyperscale designs. This CadenceTECHTALK introduces Xcelium Apps, a portfolio of domain-specific technologies implemented natively… Xcelium Apps: Everything You Need in the Simulation Metaverse

Cadence, February 17, 2022

Mixed-Signal SoC Verification Simplified with Xcelium Simulator

Analog and mixed-signal verification has always been a challenge for design and verification engineers. It has become tedious with the increasing complexity of SoC designs. Because the analog behavior of key design blocks cannot be… Mixed-Signal SoC Verification Simplified with Xcelium Simulator