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Cadence Mixed Signal

Cadence Mixed Signal Pete McCrorie and Kishore Karnane gave a suite presentation on the Virtuoso Analog Design Environment (ADE) showing how AMS Designer gives multi-level simulation of SPICE, RTL, TLM and Behavioral languages. Circuit simulators… Cadence Mixed Signal

ATEEDA – cutting the costs of analog test

ATEEDA David Hamilton, CEO at ATEEDA introduced me to his company where they help cut the cost of testing analog pins on your IC by using conventional digital testers. OptimATE has been around for two… ATEEDA – cutting the costs of analog test

Laker, OA, Pyxis – A happy and expanding IC family

Springsoft – Custom IC Layout Duncan McDonald presented in their suite about the custom IC layout editing of Laker, along with the P&R provided by Pyxis. Because these tools use Open Access (OA) in runtime… Laker, OA, Pyxis – A happy and expanding IC family

Tela Innovations – 1D Layout is Good For DFM

Neal Carney met with me on Monday afternoon to provide an update on what’s new at this hard IP company. They acquired Blaze DFM in the last year and are offering two products: PowerTrim and… Tela Innovations – 1D Layout is Good For DFM

Mephisto and Analog Design Automation

Mephisto Kenneth Francken, CEO at Mephisto explained how his tools will help make analog designers more efficient by helping them to do analog IP verification, IP migration and IP creation. This Belgium-based start-up kind of… Mephisto and Analog Design Automation

CustomSIM and HSPICE

CustomSim & HSPICE Christopher Labrecque, Marketing Manager for Analog & Mixed Signal made a suite presentation on CustomSim which includes circuit simulators like: HSPICE, HSIM, NanoSim and XA. Fredrik Ivarsson, Senior Corporate AE demonstrated the… CustomSIM and HSPICE