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Signal Integrity Issues for Silicon Interposers
January 24 @ 11:00 am - 12:00 pm EST
The development of applications like high-performance computing, Artificial Intelligence (AI) processors, and Central Processing Unit (CPU) and Graphical Processing Unit (GPU) chips involves advanced packaging technologies that radically alter traditional design methodologies and flows. Designers of high-speed components are called to co-simulate die, interposers, and package to sign off for their products’ signal integrity (SI) with the highest confidence.
About this Webinar
In this webinar, the second in a yearlong series on 3D-IC, attendees will learn about Ansys Redhawk-SC Electrothermal and its application to supporting the computational electromagnetic simulation needs of 3D-IC designers, particularly concerning silicon interposers.
What You Will Learn
- What are the biggest SI challenges for high-speed circuits built on silicon interposers
- Why electromagnetic simulation is vital for SI sign-off of such circuits
- How Ansys RedHawk-SC Electrothermal powered by RaptorX addresses the SI challenges and accelerates the path to success for 2.5D- and 3D-IC architectures
Who Should Attend
Chip designers and package designers in 3D-IC