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CadenceLIVE Europe
For the last seventeen years, CadenceLIVE has brought together technology users, developers, and industry experts to connect, share ideas and best practices, and inspire design creativity. Attendees will have the opportunity to view exciting keynotes, attend interesting user presentations, and interact with Cadence® technology experts, peers, and our sponsors in our virtual Designer Expo. CadenceLIVE Europe 2021… CadenceLIVE Europe
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arm DevSummit 2021
Engineers, developers, and tech enthusiasts: Arm DevSummit 2021 is coming to your screens October 19-21. This three-day virtual conference serves up insights into the latest technology trends, gives you an opportunity to up-level your skills in technical sessions and hands-on workshops, and offers the chance to network with like-minded software developers and hardware designers. Join… arm DevSummit 2021
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ERI Summit & MTO Symposium
What is the ERI Summit & MTO Symposium? The DARPA Microsystems Technology Office (MTO) Electronics Resurgence Initiative (ERI) is a response to several technical and economic trends in the microelectronics sector. Among these trends, the rapid increase in the cost and complexity of advanced microelectronics design and manufacture is challenging a half-century of progress under… ERI Summit & MTO Symposium
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Defending the Cloud: PCIe and CXL Data Security for High-Performance Computing
Cloud computing is going through a significant overhaul and continues to grow globally with increasing presence of hyperscale cloud providers for big data, high-performance computing (HPC), and analytics. In-house data centers are increasingly going off-premise, resulting in the co-location of data centers that manage and store data for companies and application developers to improve scalability… Defending the Cloud: PCIe and CXL Data Security for High-Performance Computing
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Advanced Antenna Design and Integration Through Circuit/EM Co-Simulation
The Cadence® AWR® V16 for RF Design Excellence Webinar Series introduces the latest capabilities in Cadence® AWR Design Environment® Version 16 (V16), providing ready access to Cadence Clarity™ 3D Solver and Celsius™ Thermal Solver for unconstrained capacity to solve large-scale and complex RF systems directly from within the RF design platform. Our next webinar in… Advanced Antenna Design and Integration Through Circuit/EM Co-Simulation
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Python in Verification Online Meetup
Veriest is inviting you to another event in our series of online Verification Meetups. This time, we'll have two presentations on the polemic topic of using Python in Verification, one by an industry expert and the other by one of Veriest technical leaders. Save the date and watch this space for more details!
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Linley Fall Processor Conference 2021
Hyatt Regency Santa Clara 5101 Great America Parkway, Santa Clara, CA, United StatesFor more than a decade, The Linley Group has delivered the industry’s premier processor conferences. This year, the Linley Fall Processor Conference will return to Santa Clara on October 20-21, 2021. If you can’t attend in person, attend the virtual event on October 27-29 and November 3-5 with live Q&A and breakout sessions. Please stay… Linley Fall Processor Conference 2021
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VSDOpen 2021 Online Conference
What is VSDOpen 2021 Agenda? Key strategy - Provide High Tech Experience of developing analog designs using Open-Source Tools, PDKs and Cloud Platform 3 days of Conference Tutorials Key Focus – Analog Products, Open-source FPGA and Semiconductor IP's Keynote Speaker – Industry leaders focused on Developing IoT, 5G and AI products, Professor from open-source Research… VSDOpen 2021 Online Conference
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Role of MIPI IP in New Automotive SoC Architectures
SoCs for Automotive applications such as ADAS, Infotainment, and connected vehicles are shifting to a more domain-based architecture. As a result, the car’s electronics for such applications are requiring a major redesign for a more efficient connectivity with the utmost reliability, security, and safety. This shift along with the increasing use of sensors and displays… Role of MIPI IP in New Automotive SoC Architectures
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CadenceCONNECT – Mission Critical 2021
Overview CadenceCONNECT will introduce you to optimized design methodologies for mission-critical electronics system applications like A&D, safety, security, 5G, and others. The event brings together Cadence® technology users, developers, and industry experts for networking, sharing best practices on critical design and verification, and discovering new techniques for designing advanced silicon, SoCs, and systems. Keynote 10:00… CadenceCONNECT – Mission Critical 2021
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Compare Performance-power of Arm Cortex vs RISC-V for AI applications
In the Webinar, we will show you how to construct, simulate, analyze, validate, and optimize an architecture model using pre-built components. We will compare micro and application benchmarks on system SoC models containing clusters of ARM Cortex A53/A77/A65AE/N1, SiFive u74, and other vendor cores. Aside from the processor resources such as cache and memory, the… Compare Performance-power of Arm Cortex vs RISC-V for AI applications
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Using OVL for Assertion-based Verification of Verilog and VHDL Designs
Open Verification Library (OVL) is a library of property checkers for digital circuit descriptions written in popular Hardware Description Languages and maintained by Accelera. The OVL checkers could be used not only in dynamic simulation, but also in formal verification and emulation. Also, the OVL-based verification technology provides the easiest way for designers to implement… Using OVL for Assertion-based Verification of Verilog and VHDL Designs
12 events found.