Synopsys
-
-
From Virtual ECU to Real Vehicle: Continuous Testing of Functional Requirements
Today, most of the software functions in a car can be tested efficiently using virtual ECU models and DevOps engineering methods. However, final acceptance tests with real vehicles are still mandatory, even though they are expensive and time-consuming. The prevalent problem is the gap between automated virtual methods and manual testing, which further increases costs… From Virtual ECU to Real Vehicle: Continuous Testing of Functional Requirements
-
5X Faster Equivalence Checking with Formality ML-driven DPX
Synopsys’ Fusion Compiler provides a broad spectrum of aggressive optimization techniques such as retiming, multibit banking and advanced data-path optimization that our designers want to take advantage of to achieve maximum PPA. Our expectation from production quality Equivalence checking is to be able to complete verification with minimal efforts and the fastest turn-around-time. This presentation… 5X Faster Equivalence Checking with Formality ML-driven DPX
-
Functional Verification to Fault Simulation: Considerations and Efficient Bring-Up
Electronic systems in automobiles are growing rapidly in size, complexity, and critical functionality. As a result, functional safety verification is emerging as an essential requirement for automotive SoC and IP designs. In order to assure that even the most stringent safety standards are met at a faster pace, comprehensive and fast fault injection and simulation… Functional Verification to Fault Simulation: Considerations and Efficient Bring-Up
-
Large-Scale and Accurate Density Functional Theory (DFT) Simulations with QuantumATK
Join this Synopsys webinar to learn how to perform large-scale, accurate and reliable Density Functional Theory (DFT) simulations with the QuantumATK platform: Discover how to perform accurate and reliable large scale DFT simulations even at the hybrid functional level - with Linear Combination of Atomic Orbital basis set using modest computational resources. Learn how to… Large-Scale and Accurate Density Functional Theory (DFT) Simulations with QuantumATK
-
Simplify & Streamline Development of ISO 26262 Compliant Automotive SoCs
Standards such as ISO 26262 define strict requirements, processes, and methods that all stakeholders – IP vendors, sub-system developers, and semiconductor SoC and system developers – must abide by when designing safety-critical automotive products. One such requirement is the Development Interface Agreement (DIA), which defines the interactions, interfaces, responsibilities, dependencies, and work products exchanged between… Simplify & Streamline Development of ISO 26262 Compliant Automotive SoCs
-
Extending Processors into Flexible Accelerators for 5G
The slowing down of Moore’s law and Dennard scaling has triggered an increased interest in application-specific instruction set processors (ASIPs). ASIPs implement a specialized instruction set architecture (ISA) tailored to the application and can replace traditional fixed-function hardware accelerators, thereby introducing software-programmability in the acceleration domain, and thus more flexibility and agility in both the… Extending Processors into Flexible Accelerators for 5G
-
Constraints-Driven CDC and RDC Verification Including UPF Aware Analysis
Today’s million gates integrated circuits (ICs) involve various intellectual properties (IPs) interfacing with each other through multiple asynchronous clock and reset domains. Ensuring all clocks propagate concurrently across each clock tree components used as clock switching elements or each sequential or combinatorial component, clock output of which becomes asynchronous with respect to the clock input… Constraints-Driven CDC and RDC Verification Including UPF Aware Analysis
-
PIC International Conference
Sheraton Brussels Airport Hotel Brussels, BelgiumThe 6th PIC International conference will build on the success of its predecessors, with industry-leading insiders delivering more than 30 presentations spanning four sectors. Attendees at the two-day conference will gain an up-to-date overview of the status of the global photonics industry, and will have the opportunity to meet many other key players within the… PIC International Conference
-
Optimizing Fault Simulations with Formal Analysis to Achieve ASIL Compliance for Automotive Designs
Most safety critical SoCs, such as those developed for automotive driver aid systems, require ASIL-D compliance. ASIL-D is the highest grade in the ISO 26262 Standard’s risk classification system, required less than 1% Single Point Fault. According to the ISO 26262 Standard, fault campaign on the targeted designs is the recommended methodology to generate FMEDA… Optimizing Fault Simulations with Formal Analysis to Achieve ASIL Compliance for Automotive Designs
-
-
22nd IEEE Nano
Edificio Gaspar Melchor de Jovellanos Carrer Eivissa, s/n, 07120 Palma, Illes Balears, SpainThe 22nd IEEE International Conference on Nanotechnology (IEEE-NANO 2022) will be held from 4th to 8th of July, 2022, at the Campus of Balearic Islands University (UIB) in Palma, the capital of Balearic Islands, Spain. IEEE-NANO is the flagship IEEE international conference on Nanotechnology, which has been a successful annual conference since 2001. Recent conferences were held… 22nd IEEE Nano
-
Overcoming PCIe 6.0 System Integration and Pre-Silicon Validation Challenges
PCIe, the most popular interconnect in compute, AI and storage systems, is now offering faster data rate, higher performance, lower power and lower latency than the previous generation. Because of these reasons and the addition of PAM-4 signaling, challenges such as signal integrity, power integrity, implementation, IP integration and more must be considered when designing… Overcoming PCIe 6.0 System Integration and Pre-Silicon Validation Challenges
-
AI-Driven Verification: Saving Time with Verdi Regression Debug Automation
Analyzing the thousands of failures from daily regression runs is a manual, tedious, and error-prone process. The process can significantly impact quality-of-results, time-to-results and cost-of-results. The Synopsys Verdi® Regression Debug Automation (RDA) is an artificial intelligence (AI) driven verification technology for automating the process of finding the root causes of failures in the design under… AI-Driven Verification: Saving Time with Verdi Regression Debug Automation