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Synopsys, November 13, 2024

ASIP University Day 2024: Domain-Specific Processor Design using ASIP Designer

The AI revolution and other application domains, like data centers, advanced wireless communications, image and video processing, automated driving assistance, and post-quantum cryptography need more powerful architectures with higher performance. This is driving demand for… ASIP University Day 2024: Domain-Specific Processor Design using ASIP Designer

Synopsys, May 22, 2024

Accelerating AI Applications Using Custom RISC-V based SIMD/VLIW DSPs

The revolution in AI triggers an increased awareness for application-specific instruction-set processors (ASIPs). These processors implement a specialized instruction-set architecture (ISA) tailored to the AI application domain, often starting from a baseline such as the… Accelerating AI Applications Using Custom RISC-V based SIMD/VLIW DSPs

Synopsys, May 24, 2023

Extending RISC Processors into Flexible Accelerators using ASIP Designer

Case Studies in Low-Power Smart Vision and Post-Quantum Cryptography Applications The slow-down of Moore’s law and Dennard scaling triggered an increased awareness for application-specific instruction-set processors (ASIPs). These processors implement a specialized instruction-set architecture (ISA)… Extending RISC Processors into Flexible Accelerators using ASIP Designer

Synopsys, November 16, 2022

ASIP University Day 2022

Application-specific instruction set processors (ASIPs) have established themselves as an important implementation option for modern SoCs, i.e. when standard processor IP cannot meet challenging application-specific requirements, and fixed hardware is not flexible enough. Synopsys’ ASIP… ASIP University Day 2022

Synopsys, June 22, 2022

Extending Processors into Flexible Accelerators for 5G

The slowing down of Moore’s law and Dennard scaling has triggered an increased interest in application-specific instruction set processors (ASIPs). ASIPs implement a specialized instruction set architecture (ISA) tailored to the application and can replace… Extending Processors into Flexible Accelerators for 5G

Synopsys, February 2, 2022

ASIP Virtual Seminar 2022

Extending RISC Processors into Flexible Accelerators using ASIP Designer Case Studies in Artificial Intelligence and Image Signal Processing The slow-down of Moore’s law and Dennard scaling has triggered an increased awareness of application-specific instruction-set processors… ASIP Virtual Seminar 2022