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Siemens, October 23, 2024

Hardware Verification using VirtuaLAB

VirtuaLAB protocol solutions offer a full-stack testing environment with seamless connectivity and stimulus traffic generation for designs under test. It operates autonomously, adapting to scenarios without requiring protocol knowledge from the user. VirtuaLAB significantly reduces… Hardware Verification using VirtuaLAB

Siemens EDA, October 8, 2024

Accelerating DFT verification sign-off with the Questa DFT Verification Platform

Accelerating DFT verification sign-off with the Questa DFT Verification Platform This seminar will update you on technologies and techniques you can adopt to increase your DFT verification productivity today. Specifically, we will cover: ‌ Navigating… Accelerating DFT verification sign-off with the Questa DFT Verification Platform

TSMC OIP 2024

TSMC North America OIP Ecosystem Forum 2024

Learn About: Emerging advanced node design challenges and corresponding design flows and methodologies for A16, N2 and N3 processes Latest updates on TSMC 3DFabric™ chip stacking and advanced packaging processes, InFO, CoWoS®, and SoIC, 3DFabric… TSMC North America OIP Ecosystem Forum 2024

46th EOS/ESD Symposium

46th Annual EOS/ESD Symposium & Exhibits

The EOS/ESD Symposium is dedicated to the understanding of issues related to electrostatic discharge and electrical transients/overstress, and the application of this knowledge to the solution of problems in consumer, industrial, and automotive applications, including… 46th Annual EOS/ESD Symposium & Exhibits

Siemens, December 7, 2023

Multi-Die System Verification with Siemens Avery UCIe VIP

Conventional monolithic SoCs are becoming a bottleneck for power, performance, and area (PPA), creating limitations for Data-intensive applications like high-performance computing (HPC), machine learning (ML) and artificial intelligence (AI), and for hyperscale data centers. These bottlenecks… Multi-Die System Verification with Siemens Avery UCIe VIP

Siemens, November 16, 2023

Boost SoC debug and analytics with embedded software and smart monitors

On-chip monitors and debug structures can dramatically simplify debug, validation, analytics, and optimization of complex SoCs. Such monitors are often accessed by software executing on an external host or debugger via USB or JTAG.  In this… Boost SoC debug and analytics with embedded software and smart monitors