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Siemens EDA

Siemens EDA, June 8-9, 2022

Customers Discuss Their Real World Use of High-Level Synthesis

Summary The focus of this seminar is to have real-world customers present their successes using Catapult High-Level Synthesis (HLS) in markets such as Automotive, 5G/Communications,… Read More »Customers Discuss Their Real World Use of High-Level Synthesis

agnisys, april 28, 2022

Formal Verification of Registers and SoC Assembly in Collaboration with Jasper™ and OneSpin™

Learn how to formally verify your design by automatically generating SystemVerilog Assertions (SVA) for your block-level register specifications, chip-level RTL, and RTL connectivity at the… Read More »Formal Verification of Registers and SoC Assembly in Collaboration with Jasper™ and OneSpin™