• Do you need to estimate the power advantage of implementing an AI algorithm on an accelerator? • Do you need to size the AI… Read More »Balancing Performance and Power in adding AI Accelerators to System-on-Chip (SoC)
This CadenceTECHTALK will offer an overview of the Protium™ Enterprise Prototyping Platform for fast hardware and software verification. We will review the traditional prototyping challenges… Read More »Accelerating Complex SoCs Prototyping with Protium X2
Abstract: Today’s FPGAs and SoC FPGAs use various types of bus interconnect – such as AXI, APB, AHB, Avalon or Wishbone – for both internal… Read More »LIVE WEBINAR: How to Simplify the Verification of Bus Interfaces (US)
Thursday, September 30, 2021 | 11:00 -11:30 a.m. PDT The development of secure systems is of paramount importance in this age of software intensive electronic… Read More »Avoiding SoC Security Threats – What Verification Engineers Should Know
Learn how UVM Register Access Layer (RAL) can help Presenter: Srinivasan Venkataramanan, Entrepreneur and Head of VerifWorks Thursday, September 23, 2021 Abstract: The use of… Read More »UVM for FPGAs (Part 3): Verifying Zynq MPSoC Designs?