DVClub Europe – Formal Verification

• Formal Verification can help you find bugs earlier in the design cycle and accelerate root cause analysis. But success with Formal requires the effective selection and implementation of the right formal technologies and methods. In this DVClub meeting our speakers will share their experiences adopting Formal Verification and then open the floor for discussion followed by the usual networking opportunities.

Agenda (BST)

12:00   Welcome and Introduction – Mike Bartley, Tessolve
12:00 Brajmohan Sharma, Marvel Technology – Advanced Formal Verification and Robust Regression Strategies for Highly Parameterized Designs
12:20 Easwaran Krishnan & Savita Suresh Lohar, Tessolve Semiconductor
12:40 Gayatri Padhy, Object Automation – Formal Verification with AI/ML
13:00 Cadence Design System
13:15 Neena Chandawale ,Agnisys
13:30 Close

Register now to become a part of this event. Free to attend online.