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CXL

Siemens EDA

Protocol and Memory Interface Verification in the Shrinking World of 3DIC

Emerging 2.5D and 3DIC packaging technologies enable more design complexity, and bring some new verification challenges. We look at how to scale your verification capability… Read More »Protocol and Memory Interface Verification in the Shrinking World of 3DIC

rambus siemens

CXL and IDE: Important Considerations of Protecting High Speed Interconnects

In a few short years, CXL (Compute Express Link) has evolved from an idea to a rapidly proliferating low latency interconnect standard being adopted into… Read More »CXL and IDE: Important Considerations of Protecting High Speed Interconnects

Defending the Cloud: PCIe and CXL Data Security for High-Performance Computing

Defending the Cloud: PCIe and CXL Data Security for High-Performance Computing

Cloud computing is going through a significant overhaul and continues to grow globally with increasing presence of hyperscale cloud providers for big data, high-performance computing… Read More »Defending the Cloud: PCIe and CXL Data Security for High-Performance Computing

Synopsys September 15

How Synopsys Interface IP and Arm Interoperate to Accelerate System IO and Memory Performance

In this webinar, Synopsys and Arm describe how their recent collaboration helps maximize system performance and shorten Arm-based SoC design cycles. Learn how to minimize… Read More »How Synopsys Interface IP and Arm Interoperate to Accelerate System IO and Memory Performance

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