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Doulos

Doulos, September 20, 2023

Maximize Design Productivity using Vivado ML with SystemVerilog

Although SystemVerilog is perhaps most widely used in the context of hardware verification, it also contains many features directly relevant to FPGA hardware designers. We explore the features of SystemVerilog that are useful for RTL… 

Doulos, September 6, 2023

Everything You Need to Know about SystemVerilog Arrays

This webinar gives a comprehensive guide to all aspects of SystemVerilog arrays: ordinary static arrays, dynamic arrays, queues and associative arrays. It also includes array methods and practical examples. Topics: Review of Verilog array types… 

Doulos, August 10, 2023

Dealing with Inconclusive Formal Proofs

Webinar Overview: Formal proofs of end-to-end properties can be a very valuable contribution to RTL sign-off and yet are often the most difficult to achieve. In this webinar Doulos Senior Member Technical Staff, Doug Smith… 

VF 2023 Austin

Verification Futures 2023 Austin

The Verification Futures conferences is dedicated to discussing the challenges faced in hardware and software verification. To view the agenda for this event please visit the VF2023 Event Page. The full conference program includes 17 talks covering… 

Versal Workshop

Versal Adaptive SoCs ONLINE WORKSHOP

Standard Level – 2 sessions (4 hours per session including breaks) With thanks to AMD Xilinx for sponsoring this workshop: It is available to attend FREE OF CHARGE (Usual price $990)  March 30-31 2023 – Americas – Register… 

Verification Futures 2023 UK

Verification Futures 2023 UK

The Verification Futures conference provides a unique blend of conference presentations, exhibitions, training and industry networking sessions dedicated to discussing the challenges faced in hardware and software verification. Verification Futures provides a unique opportunity for… 

Doulos, March 15, 2023

Become an SVA Expert in One Hour

Doulos Co-Founder & Technical Fellow John Aynsley will teach the core principles necessary to understand and use SystemVerilog Assertions, focussing on the aspects of SVA that are applicable to both formal verification and simulation. Particular emphasis will… 

Doulos, Feb 10, 2023

Formal Verification for Non-Specialists

Is formal verification ready for general use or do you need a PhD to use it? Larger companies continue to recruit formal PhDs into their verification teams while other less-well-qualified engineers seem reluctant to go beyond… 

Rapid Silicon

Merry Christmas 2022

I found the first holiday video from Ansys posted on December 14th, so enjoy the photos and videos to bring you some cheer as 2022 winds down. Previous years: 2021 2020 2019 2018 2017 2016…