Synopsys Webinar | Thursday, May 25, 2023 | 9:00 a.m. PT According to a recent Semico Research report, the RISC-V Core IP market is expected to grow at a 34.9% CAGR through year 2027. With… Don’t Take the Risk, Formally Verify Your RISC-V Cores
The Austin RISC-V Group is back, and we’re planning a regular schedule of the second Tuesday of every month. This will be an on-line event. We’ll be the RISC-V Bivy virtual meeting system, and this… May 2023 Austin RISC-V Meetup
Case Studies in Low-Power Smart Vision and Post-Quantum Cryptography Applications The slow-down of Moore’s law and Dennard scaling triggered an increased awareness for application-specific instruction-set processors (ASIPs). These processors implement a specialized instruction-set architecture (ISA)… Extending RISC Processors into Flexible Accelerators using ASIP Designer
The use of the RISC-V ISA to develop processors for SoCs is a growing trend. An important driver is the ability to customize or create ISA and micro-architectural extensions to differentiate designs across application areas… Taking the Risk out of RISC-V with Fast, Architecture-Driven, PPA Optimization
The programming interfaces of logic simulators are largely the domain of specialists writing proprietary tools and extensions and are only vaguely in the consciousness of many design and verification engineers, if aware at all. Yet… The Power of VHDL’s VHPI
Dealing with Uncertainty The global economy is sending mixed messages, and with every new data release comes a new batch of upbeat or defeatist headlines. Uncertainty remains if inflation is fully under control and how… GSA 2023 European Executive Forum
This will be an on-line event. We’ll be the RISC-V Bivy virtual meeting system. The use of a microphone and/or camera are not required to participate in the event, chat will be monitored. We’ll be… March Austin RISC-V Meetup
Get ready for our next RISC-V meetup, this time again as physical meeting. One day after the doors of Embedded World close, we will meet to bring together RISC-V enthusiasts from Munich, Bavaria and the… Munich RISC-V Meetup
The Verification Futures conference provides a unique blend of conference presentations, exhibitions, training and industry networking sessions dedicated to discussing the challenges faced in hardware and software verification. Verification Futures provides a unique opportunity for… Verification Futures 2023 UK
With the growing maturity of the RISC-V ISA, chip companies now have a wealth of options for implementing RISC-V cores in their latest product. At the same time the support ecosystem is growing, with standards… Removing the Risk from RISC-V using the RISC-V Trace Standard