- This event has passed.
Arm and Cadence: Achieving Best Silicon Power, Performance, and Area
May 11, 2022 @ 10:00 am - 1:00 pm PDT
How do you deal with design requirements that span high performance, energy-efficient computing, and high-reliability implementation? To realize these goals, you need optimal design flows to deliver the best power, performance, and reliability.
Join Cadence and Arm virtually for CadenceCONNECT: Arm and Cadence – Achieving Best Silicon Power, Performance, and Area. Learn about:
- High-performance design for the Arm® Cortex®-A710 and other Arm processors
- Energy-efficient CPU implementation flows
- High-reliability design using Arm library IP
- Aging-aware static timing analysis (STA)
Explore how you can efficiently implement your Arm-based SoCs with the Cadence® digital full-flow solution and get the best power, performance, and area (PPA).
Register now and join us on May 11.
Event times per region. Each event is 3 hours long.
Asia-Pacific
9:00am CST | 10:00am JST, KST
Europe, Israel, India
9:00am BST | 10:00am CEST | 11:00am Israel | 1:30pm India
North America
1:00pm EDT I 10:00am PDT
| Sessions | Speaker |
|---|---|
| Delivering Best-in-Class PA and TAT for Arm Total Compute Using Cadence Digital Full Flow |
Pierre-Alexandre Bou-Ach, Arm, and Paddy Mamtora, Cadence |
| Achieving Outstanding Performance for Arm Cortex-A710 Processor Using Samsung Foundry 4LPP and the Cadence Digital Flow |
Chinthamani Jagannath, Cadence |
| Energy-Efficient 5nm High-Performance Arm Core Implementation Using Cadence Digital Full Flow |
Olivier Rizzo, Arm |
| Achieving 3.6GHz+ for New Client Markets Through Implementation Using Cadence Digital Full Flow |
Rahoul Varma and Haroon Gauhar, Arm, and Paddy Mamtora, Cadence |
| Gain PA Advantage with New Aging-Aware STA Solution for High-Performance Semiconductor Designs |
Satheesh Balasubramanian, Arm, and Paddy Mamtora, Cadence |
| High-Reliability Soft-Error Resilience Design Implementation Using Arm IP and Cadence Digital Full Flow |
Robert Christy, Arm, and Desmond Cicero, Cadence |