Webinar
Virtual Prototyping Day – Silver: Accelerate Your Innovation with Virtual ECUs
Synopsys invites you to the Virtual Prototyping Day – Silver, a virtual event on virtual ECUs and applications in automotive software development. Users share their experiences with the latest techniques… Read More »Virtual Prototyping Day – Silver: Accelerate Your Innovation with Virtual ECUs
Enabling Effective Design & Layout Collaboration for Next Generation Analog and Mixed-Signal Designs
Analog designers appreciate the importance of tight communication between layout and design teams, yet with geographically dispersed teams this can be a big challenge. Close collaboration between circuit designer and… Read More »Enabling Effective Design & Layout Collaboration for Next Generation Analog and Mixed-Signal Designs
The Evolution of Process TCAD in Semiconductor R&D and Manufacturing
Shela Aboud, Ph.D., Synopsys Today, nearly every aspect of an integrated circuit is designed using EDA software. Technology computer aided design (TCAD) tools are used for modeling front-end-of-line manufacturing, including… Read More »The Evolution of Process TCAD in Semiconductor R&D and Manufacturing
What’s Needed to Perform End-to-End Testing for 5G Open Radio Access Network SoCs
Testing an O-RAN Radio Unit (O-RU) SoC at full scale implies sending realistic traffic, in conformance with current specifications and at the right time on the right interfaces to simulate… Read More »What’s Needed to Perform End-to-End Testing for 5G Open Radio Access Network SoCs
Practical Flows for Continuous Integration: Making The Most of Your EDA Tools
Verifying changes to RTL and testbench code prior to releasing to the rest of your team is the best way to avoid committing bugs that cause massive, team-wide disruptions. This… Read More »Practical Flows for Continuous Integration: Making The Most of Your EDA Tools
Accelerating Analog Layout
The growing demand for analog features on IoT devices means that analog designers are under constant pressure to complete more designs faster than ever. For most layout designers, analog layout… Read More »Accelerating Analog Layout
CadenceTECHTALK: Power and Energy Optimization Using Tensilica IP
Join us as Cadence experts describe common challenges and solutions in creating an efficient and accelerated flow that will meet technical requirements for accurately measuring the power, energy, and system… Read More »CadenceTECHTALK: Power and Energy Optimization Using Tensilica IP
A Scalable Approach to 2X Faster Turnaround Time for Arm Neoverse N2 Core Design Verification
In the latest generation of multiple processor SoCs, designers are adding cache-coherent agents beyond the multi-processor clusters, making it a complex verification challenge. System coherency needs to be maintained at… Read More »A Scalable Approach to 2X Faster Turnaround Time for Arm Neoverse N2 Core Design Verification
Accelerate Semiconductor Technology Development and Innovation
Seminar Overview Join our online TCAD Seminar to learn about the application of Synopsys TCAD solutions to accelerate the research, development and optimization of semiconductor technologies. The seminar tracks cover… Read More »Accelerate Semiconductor Technology Development and Innovation
Everything you wanted to know about VHDL configurations
VHDL configurations are a much maligned, much ignored part of the VHDL language. Consequently, many VHDL designers find them quite scary. This webinar seeks to answer the questions you may… Read More »Everything you wanted to know about VHDL configurations
LIVE WEBINAR: How to Simplify the Verification of Bus Interfaces (US)
Abstract: Today’s FPGAs and SoC FPGAs use various types of bus interconnect - such as AXI, APB, AHB, Avalon or Wishbone - for both internal (IP-level) and external communication. A… Read More »LIVE WEBINAR: How to Simplify the Verification of Bus Interfaces (US)
Ensuring Standards Compliance: Automating Post-Route Analysis for Hundreds of Serial Links
Presented by Todd Westerhoff, Product Marketing Manager for High-Speed System Design, Siemens EDA Abstract The PCB layout team has just handed you back a routed database with hundreds of serial… Read More »Ensuring Standards Compliance: Automating Post-Route Analysis for Hundreds of Serial Links