Skip to content

FPGA

Aldec, May 19, 2022

FPGA Design/Verification: Code, Functional and Specification Coverage

Functional coverage is often mentioned together with constrained-random verification, and this is a great combination. However, functional coverage is also very useful even if you… Read More »FPGA Design/Verification: Code, Functional and Specification Coverage

Aldec, March 10, 2022

Using SVA for Requirements-Based Verification of Safety-Critical FPGA Designs

Requirements-based verification (RBV) is a popular verification process for FPGA designs used in safety-critical systems. The effectiveness of RBV is limited by the quality and… Read More »Using SVA for Requirements-Based Verification of Safety-Critical FPGA Designs