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Doulos, May 24-25, 2022

Versal ACAP Workshop Online

The Xilinx Versal ACAP platform is multi-featured, offering unprecedented system level performance and integration. This informative workshop (delivered in 2 half day sessions) is a comprehensive and practical introduction to the features and capabilities. We’ll… 

Aldec, May 12, 2022

FPGA Design/Verification: Randomization

Randomization is very important for modern verification. Still, very few designers apply randomization sufficiently in their testbenches. This means they are missing out on a very important method for finding potential bugs in their design,… 

Aldec, May 5, 2022

FPGA Verification Architecture Optimization with UVVM

Presenter: Espen Tallaksen, CEO of EmLogic Thursday, May 5, 2022 Abstract: For most FPGA projects, over 50% of the overall project time is spent on verification. This time can be significantly reduced if the verification… 

Aldec, April 14, 2022

Running CDC Analysis with Xilinx Parameterized Macros

Designing FPGAs that use a single clock domain is a luxury that very few of us have. Modern FPGA designs must cope with multiple clocks running at different frequencies, very often asynchronous to each other,… 

Aldec, April 28, 2022

Webinar: FPGA Design Architecture Optimization

The FPGA design architecture is the single most important and primary factor in achieving development efficiency, quality and reliability. The difference between a good and a bad design architecture can be about 50% of the… 

FPGA 22

FPGA 22

The ACM/SIGDA International Symposium on Field-Programmable Gate Arrays is a premier conference for presentation of advances in FPGA technology. Accepted papers will be published in the conference proceedings and available in the ACM Digital Library.…