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Magma’s Titan – Analog Elegance

Last Friday I had an online meeting with Ashutosh Mauskar, vice president of Magma’s Custom Design Business Unit to learn what was new with the Titan product lineup. Magma has been very involved with interoperable… Magma’s Titan – Analog Elegance

CiraNova

Ciranova – More Analog, Less Time

I met with Dave Milman, Marketing at Ciranova on Tuesday afternoon. Big news this last week is that TSMC is now supporting iPDKs because we are no longer locked to Cadence Pcells. PDKs from foundry… Ciranova – More Analog, Less Time

Cadence Mixed Signal

Cadence Mixed Signal Pete McCrorie and Kishore Karnane gave a suite presentation on the Virtuoso Analog Design Environment (ADE) showing how AMS Designer gives multi-level simulation of SPICE, RTL, TLM and Behavioral languages. Circuit simulators… Cadence Mixed Signal

ATEEDA – cutting the costs of analog test

ATEEDA David Hamilton, CEO at ATEEDA introduced me to his company where they help cut the cost of testing analog pins on your IC by using conventional digital testers. OptimATE has been around for two… ATEEDA – cutting the costs of analog test

Laker, OA, Pyxis – A happy and expanding IC family

Springsoft – Custom IC Layout Duncan McDonald presented in their suite about the custom IC layout editing of Laker, along with the P&R provided by Pyxis. Because these tools use Open Access (OA) in runtime… Laker, OA, Pyxis – A happy and expanding IC family