Join Cadence® Training and Principal Application Engineer Daniel Bayer for this free technical training webinar. The Indago™ Debug Platform is optimized for scalability, supporting debug of simulation runs as well as emulation, where support for… Bug Tracking with Indago Interactive for Specman
Join us as Cadence experts describe common challenges and solutions in creating an efficient and accelerated flow that will meet technical requirements for accurately measuring the power, energy, and system performance while making essential design… CadenceTECHTALK: Power and Energy Optimization Using Tensilica IP
Integrated photonics adoption has made tremendous progress but is still slow and uneven outside of its most common use in data communications. What will it take for photonics to become a “standard” technology in the… Fostering a Photonics Ecosystem for Sustainable Adoption
The last webinar in The Cadence® AWR® V16 for RF Design Excellence Webinar Seriesintroduces groundbreaking cross-platform workflows from AWR® software to Allegro® PCB Designer, which help to deliver up to a 50% reduction in turnaround… Intelligent Cross-Platform Workflows for RF PCB Integration
In 2021, the Electronic Design Process Symposium (EDPS) is in its 28th year, and it continues to serve as a leading forum for thought leaders of the design community from industry participants as well as… 28th Electronic Design Process Symposium
Overview Regressions time often becomes one of the biggest challenges to meet the tight project schedule with increasing complexity of the SoC designs and shorter time to market. Verification engineers apply a coverage-driven methodology and… Xcelium ML for 5X Faster Regression Throughput
The Cadence® AWR® V16 for RF Design Excellence Webinar Series introduces the latest capabilities in Cadence® AWR Design Environment® Version 16 (V16), providing ready access to Cadence Clarity™ 3D Solver and Celsius™ Thermal Solver for… Advanced Antenna Design and Integration Through Circuit/EM Co-Simulation
Overview CadenceCONNECT will introduce you to optimized design methodologies for mission-critical electronics system applications like A&D, safety, security, 5G, and others. The event brings together Cadence® technology users, developers, and industry experts for networking, sharing… CadenceCONNECT – Mission Critical 2021
Overview Low power DRAM is being adopted in a wide array of markets, including automotive, PCs and networking systems built for 5G and AI applications. The specification complexity is increasing to meet higher bandwidth, better… Boost LPDDR5 Verification from IP to System Level
Many design teams have used some form of hardware verification throughout their verification cycle for years now. Some engineering teams prefer to use emulation, some prefer to use prototyping, and some even use both. Why… Benefits of a Common Methodology for Emulation and Prototyping