Intel Foundry Services, It’s Awakening
In the semiconductor foundry business we all know that TSMC sits at the top, followed by: Samsung, UMC, GlobalFoundries and SMIC. So Intel wants back into this service business, and is slowly rebuilding its capabilities… Intel Foundry Services, It’s Awakening
Introduction to Questa Lint and CDC for Designers
Have you ever had RTL code that passes simulation but still fails due to things like unreachable code, out-of-range violations, or incorrect order of execution? Have you ever dealt with a multi-clock design that had… Introduction to Questa Lint and CDC for Designers
Ensuring Standards Compliance: Automating Post-Route Analysis for Hundreds of Serial Links
Presented by Todd Westerhoff, Product Marketing Manager for High-Speed System Design, Siemens EDA Abstract The PCB layout team has just handed you back a routed database with hundreds of serial links routed to your specifications… Ensuring Standards Compliance: Automating Post-Route Analysis for Hundreds of Serial Links
2022 IEEE Custom Integrated Circuits Conference (CICC)
The IEEE Custom Integrated Circuits Conference is a premier conference devoted to IC development. The conference program is a blend of oral presentations, exhibits, panels and forums. The conference sessions present original first published technical… 2022 IEEE Custom Integrated Circuits Conference (CICC)
DVCON India
This conference will give you ample opportunities to share and highlight your technical contibutions in the areas of Verificaiton and Validations, Methodology & Automation, Functional Safety & Security, Low Power and Mixed Signal Design, Static… DVCON India
Understanding Random Stability in SystemVerilog and UVM
Webinar Overview: A common issue with constrained random simulation is being able to reproduce random stimulus for debug purposes and for locking down regressions test suites. This is especially problematic when the source code needs… Understanding Random Stability in SystemVerilog and UVM
Osmosis 2021 (OneSpin User Group)
What is Osmosis? Osmosis is the name for all users’ group events for customers and partners of OneSpin: A Siemens Business, provider of electronic design automation (EDA) tools for integrated circuit (IC) integrity verification. Though the Osmosis… Osmosis 2021 (OneSpin User Group)
28th Electronic Design Process Symposium
In 2021, the Electronic Design Process Symposium (EDPS) is in its 28th year, and it continues to serve as a leading forum for thought leaders of the design community from industry participants as well as… 28th Electronic Design Process Symposium
Formal 101 – Exhaustive Scoreboarding and Data Integrity Verification Made Easy
Verifying the correct passage of data through a DUT in constrained-random simulation is easy to do for basic I/O cases – data loss, obvious corruption, and 1-1 data passage. But what about verifying out-of-order cases?… Formal 101 – Exhaustive Scoreboarding and Data Integrity Verification Made Easy